net: hns3: change type of numa_node_mask as nodemask_t
authorPeiyang Wang <wangpeiyang1@huawei.com>
Tue, 7 May 2024 13:42:20 +0000 (21:42 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 17 May 2024 09:51:00 +0000 (11:51 +0200)
[ Upstream commit 6639a7b953212ac51aa4baa7d7fb855bf736cf56 ]

It provides nodemask_t to describe the numa node mask in kernel. To
improve transportability, change the type of numa_node_mask as nodemask_t.

Fixes: 38caee9d3ee8 ("net: hns3: Add support of the HNAE3 framework")
Signed-off-by: Peiyang Wang <wangpeiyang1@huawei.com>
Signed-off-by: Jijie Shao <shaojijie@huawei.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/net/ethernet/hisilicon/hns3/hnae3.h
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h

index 8dfa372df8e77422c8142620f0d21becf8f03743..f362a2fac3c297bea33cf29c1a677b4adeed9e26 100644 (file)
@@ -829,7 +829,7 @@ struct hnae3_handle {
                struct hnae3_roce_private_info rinfo;
        };
 
-       u32 numa_node_mask;     /* for multi-chip support */
+       nodemask_t numa_node_mask; /* for multi-chip support */
 
        enum hnae3_port_base_vlan_state port_base_vlan_state;
 
index a744ebb72b1373167e316afb9a2f564c9255da2d..a0a64441199c50931c185a118a0d30ae91500ac3 100644 (file)
@@ -1825,7 +1825,8 @@ static int hclge_vport_setup(struct hclge_vport *vport, u16 num_tqps)
 
        nic->pdev = hdev->pdev;
        nic->ae_algo = &ae_algo;
-       nic->numa_node_mask = hdev->numa_node_mask;
+       bitmap_copy(nic->numa_node_mask.bits, hdev->numa_node_mask.bits,
+                   MAX_NUMNODES);
        nic->kinfo.io_base = hdev->hw.hw.io_base;
 
        ret = hclge_knic_setup(vport, num_tqps,
@@ -2517,7 +2518,8 @@ static int hclge_init_roce_base_info(struct hclge_vport *vport)
 
        roce->pdev = nic->pdev;
        roce->ae_algo = nic->ae_algo;
-       roce->numa_node_mask = nic->numa_node_mask;
+       bitmap_copy(roce->numa_node_mask.bits, nic->numa_node_mask.bits,
+                   MAX_NUMNODES);
 
        return 0;
 }
index 4e52a7d96483c764d625bdefde7bb20d40f886f8..1ef5b4c8625a786bb0646fe70960ce2784918069 100644 (file)
@@ -863,7 +863,7 @@ struct hclge_dev {
 
        u16 fdir_pf_filter_count; /* Num of guaranteed filters for this PF */
        u16 num_alloc_vport;            /* Num vports this driver supports */
-       u32 numa_node_mask;
+       nodemask_t numa_node_mask;
        u16 rx_buf_len;
        u16 num_tx_desc;                /* desc num of per tx queue */
        u16 num_rx_desc;                /* desc num of per rx queue */
index bd8468c2d9a68f0f44f1a03088c68cb38feb225a..9afb44d738c4e7e2a74695268163ec669be2cdb9 100644 (file)
@@ -537,7 +537,8 @@ static int hclgevf_set_handle_info(struct hclgevf_dev *hdev)
 
        nic->ae_algo = &ae_algovf;
        nic->pdev = hdev->pdev;
-       nic->numa_node_mask = hdev->numa_node_mask;
+       bitmap_copy(nic->numa_node_mask.bits, hdev->numa_node_mask.bits,
+                   MAX_NUMNODES);
        nic->flags |= HNAE3_SUPPORT_VF;
        nic->kinfo.io_base = hdev->hw.io_base;
 
@@ -2588,8 +2589,8 @@ static int hclgevf_init_roce_base_info(struct hclgevf_dev *hdev)
 
        roce->pdev = nic->pdev;
        roce->ae_algo = nic->ae_algo;
-       roce->numa_node_mask = nic->numa_node_mask;
-
+       bitmap_copy(roce->numa_node_mask.bits, nic->numa_node_mask.bits,
+                   MAX_NUMNODES);
        return 0;
 }
 
index 5c7538ca36a764346c4cc7d1785d66a2875e7bf2..2b216ac96914c913375a113ebd30aed47c543d83 100644 (file)
@@ -298,7 +298,7 @@ struct hclgevf_dev {
        u16 rss_size_max;       /* HW defined max RSS task queue */
 
        u16 num_alloc_vport;    /* num vports this driver supports */
-       u32 numa_node_mask;
+       nodemask_t numa_node_mask;
        u16 rx_buf_len;
        u16 num_tx_desc;        /* desc num of per tx queue */
        u16 num_rx_desc;        /* desc num of per rx queue */