x86/PCI: Mark Intel C620 MROMs as having non-compliant BARs
authorXiaochun Lee <lixc17@lenovo.com>
Fri, 15 May 2020 03:31:07 +0000 (23:31 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 17 Jun 2020 14:41:53 +0000 (16:41 +0200)
commitc483aa65c921373f7c74facaaa23e9c579e915b9
tree7a45bec3faa941ccc52ca241f5c6c82d95195e87
parent1c79088861cd50735d920eca65e0da7d9deb979a
x86/PCI: Mark Intel C620 MROMs as having non-compliant BARs

commit 1574051e52cb4b5b7f7509cfd729b76ca1117808 upstream.

The Intel C620 Platform Controller Hub has MROM functions that have non-PCI
registers (undocumented in the public spec) where BAR 0 is supposed to be,
which results in messages like this:

  pci 0000:00:11.0: [Firmware Bug]: reg 0x30: invalid BAR (can't size)

Mark these MROM functions as having non-compliant BARs so we don't try to
probe any of them.  There are no other BARs on these devices.

See the Intel C620 Series Chipset Platform Controller Hub Datasheet,
May 2019, Document Number 336067-007US, sec 2.1, 35.5, 35.6.

[bhelgaas: commit log, add 0xa26d]
Link: https://lore.kernel.org/r/1589513467-17070-1-git-send-email-lixiaochun.2888@163.com
Signed-off-by: Xiaochun Lee <lixc17@lenovo.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/x86/pci/fixup.c