perf/x86: Fix exclusion of BTS and LBR for Goldmont
authorAndi Kleen <ak@linux.intel.com>
Fri, 9 Dec 2016 00:14:17 +0000 (16:14 -0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 9 Jan 2017 07:21:45 +0000 (08:21 +0100)
commit7b9e1a16a1b080939a5fabf4441ba337246f531e
treed18ec5b05c45e116845b469070b63d3e5053d984
parente24523a80c19b549e6dbc4cb7b9ec8a066a2d75c
perf/x86: Fix exclusion of BTS and LBR for Goldmont

commit b0c1ef52959582144bbea9a2b37db7f4c9e399f7 upstream.

An earlier patch allowed enabling PT and LBR at the same
time on Goldmont. However it also allowed enabling BTS and LBR
at the same time, which is still not supported. Fix this by
bypassing the check only for PT.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: alexander.shishkin@intel.com
Cc: kan.liang@intel.com
Fixes: ccbebba4c6bf ("perf/x86/intel/pt: Bypass PT vs. LBR exclusivity if the core supports it")
Link: http://lkml.kernel.org/r/20161209001417.4713-1-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/x86/events/core.c
arch/x86/events/perf_event.h