IB/mlx5: Fix MR cache initialization
authorArtemy Kovalyov <artemyko@mellanox.com>
Mon, 15 Oct 2018 11:13:35 +0000 (14:13 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 13 Nov 2018 19:12:39 +0000 (11:12 -0800)
commit5855f20512985c935087cc3e08c2cbeb91cce87e
tree65cf6f12bb45c09075b80b5b7991c60ce50ce933
parent2a270b59969ad7edb53cbf25bcdec9a373ce53b5
IB/mlx5: Fix MR cache initialization

commit 013c2403bf32e48119aeb13126929f81352cc7ac upstream.

Schedule MR cache work only after bucket was initialized.

Cc: <stable@vger.kernel.org> # 4.10
Fixes: 49780d42dfc9 ("IB/mlx5: Expose MR cache for mlx5_ib")
Signed-off-by: Artemy Kovalyov <artemyko@mellanox.com>
Reviewed-by: Majd Dibbiny <majd@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/infiniband/hw/mlx5/mr.c